1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor wafer and a semiconductor device, and more particularly relates to a method of manufacturing a semiconductor wafer which is used to produce semiconductor chips to be mounted by thermo compression and ultrasonic vibrations, and a method of manufacturing a semiconductor device using such semiconductor chips.
2. Description of the Related Art
When electrodes of electronic components and electrodes of a wiring substrate are bonded by a flip chip bonding method, it is possible to reduce a 20 mounting area of such electrodes and to shorten circuit wirings. Therefore, the flip chip bonding method is preferable to pack elements and to mount high frequency devices. Japanese Patent Laid-Open Publication No. Hei 8-330,880 (page 1 and FIG. 1) and “Flip-Chip Assembly Technique for SAW Device (Pros. ISHM'95)” describe such a flip chip bonding method, in which no intermediate material is required and elements can be bonded with a reduced number of steps and in a short time period, thereby reducing a manufacturing cost.
Generally, semiconductor chips (including bare chips, chip scale packages and so on) as electronic components are manufactured as described hereinafter. First of all, an integrated circuit is made on a main surface of a semiconductor wafer 100. Then, the semiconductor wafer 100 is thinned down to approximately 250 μm thick, for example. Specifically, the rear surface of the semiconductor wafer 100 is ground by a grinding machine which is rotated via a spindle. Thereafter, the semiconductor wafer 100 is diced, thereby producing semiconductor chips 104.
However, after the grinding process, minute spiral and radial scratches 101 are caused on the rear surface of the semiconductor wafer 100 as shown in FIG. 15 of the accompanying drawings. If the semiconductor wafer 100 is diced along dicing streets 102 and 103 in the shape of a grid, scratches 101 on the rear surface of the semiconductor chips 104 will be dissimilar in their directions depending upon where the semiconductor chips 104 are present on the semiconductor wafer 100.
For instance, it is assumed here that one semiconductor chip 104 is made in an area shown by a circle “a” as shown in FIG. 16. Referring to FIG. 17(B), the scratches 101 on the semiconductor chip 104 is in the shape of a pinstripe which is perpendicular to a reference direction A of the semiconductor chip 104. A circle “b” is at a position which is displaced by 90° from the circle “a” when the center of the semiconductor wafer 100 is assumed to match up the axis of rotation. The directions of the scratches 101 vary with the positions where the semiconductor chips 104 are made on the semiconductor wafer 100. In other words, the semiconductor chips 104 have scratches 104 whose directions are different.
It is assumed that such a semiconductor chip 104 is used as an electronic component, and an integrated circuit carrying surface of the semiconductor chip 104 is bonded to a wiring substrate via bumps using ultrasonic vibrations and thermo compression. The following problems will be caused. Since the scratches 101 on the rear surface of each semiconductor chip 104 are dissimilar in their directions, different frictional forces will be generated between rear surfaces of the semiconductor chips 104 and a bonding tool. There will be different bonding intensities between electrodes of each semiconductor chip 104 and electrodes of the wiring substrate. Therefore, it is very difficult to reliably and firmly bond the semiconductor chip 104 onto the wiring substrate.